Commit fcd2a3bf authored by Gauthier Quesnel's avatar Gauthier Quesnel
Browse files

WIP: component

parent 15a612dc
Pipeline #40551 failed with stage
in 1 minute
......@@ -43,6 +43,21 @@ struct parameter
real values[8];
};
template<typename DataArray, typename T, typename Function>
void for_each(const DataArra& data, vector<T>& vec, Function&& f)
{
i64 i = 0, e = v.size();
while (i != e) {
if (auto* ptr = data.try_to_get(vec[i]); ptr) {
f(*ptr);
++i;
} else {
v.swap_pop_back(i);
}
}
}
struct connection
{
u64 src; // model_id or component_id
......@@ -104,7 +119,9 @@ struct modeling
component_ref_id head = component_ref_id{ 0 };
};
////
/*
* Implementation
*/
inline child::child(model_id model) noexcept
: id{ ordinal(model) }
......@@ -119,13 +136,13 @@ inline child::child(component_ref_id component) noexcept
inline port::port(model_id model, i8 port) noexcept
: id{ ordinal(model) }
, type{ child_type::model }
, port(port_)
, port{ port_ }
{}
inline port::port(component_ref_id component, i8 port) noexcept
: id{ ordinal(component) }
, type{ child_type::component }
, port(port_)
, port{ port_ }
{}
} // namespace irt
......
......@@ -6,10 +6,9 @@
namespace irt {
static status
build_models_recursively(const modeling& mod,
const component_ref& comp_ref,
simulation& sim)
static status build_models_recursively(const modeling& mod,
const component_ref& comp_ref,
simulation& sim)
{
comp_ref.mappers.clear();
......@@ -47,14 +46,13 @@ build_models_recursively(const modeling& mod,
return status::success;
}
static status
build_simulation_connection(const component& src,
model_id mdl_src,
i8 port_src,
const component& dst,
model_id mdl_dst,
i8 port_dst,
simulation& sim)
static status build_simulation_connection(const component& src,
model_id mdl_src,
i8 port_src,
const component& dst,
model_id mdl_dst,
i8 port_dst,
simulation& sim)
{
auto* src_map_id = src.mappers.get(mdl_src);
auto* dst_map_id = dst.mappers.get(mdl_dst);
......@@ -71,11 +69,10 @@ build_simulation_connection(const component& src,
return sim.connect(*src_sim, port_src, *dst_sim, port_dst);
}
static status
build_model_to_model_connection(const modeling& mod,
const component_ref& comp_ref,
simulation& sim,
int i)
static status build_model_to_model_connection(const modeling& mod,
const component_ref& comp_ref,
simulation& sim,
int i)
{
irt_assert(comp_ref.connections[i].type_src == child_type::model);
irt_assert(comp_ref.connections[i].type_dst == child_type::model);
......@@ -93,38 +90,84 @@ build_model_to_model_connection(const modeling& mod,
sim);
}
static status
build_model_to_component_connection(const modeling& mod,
const component_ref& compo_ref,
simulation& sim,
int index)
static bool found_input_port(const modeling& mod,
component_ref_id compo_ref,
i8 port,
model_id& model_found,
i8& port_found)
{
irt_assert(comp_ref.connections[i].type_src == child_type::model);
irt_assert(comp_ref.connections[i].type_dst == child_type::component);
irt_assert(i >= 0 && i < comp_ref.connections.size());
for (;;) {
auto* c_ref = mod.component_ref.try_to_get(compo_ref);
if (!c_ref)
return false;
auto* c = mod.components.try_to_get(c_ref->id);
if (!c)
return false;
if (!(0 <= port && port < c->x.size()))
return false;
if (c->x[port].type == child_type::model) {
auto id = enum_cast<model_id>(c->x[port].id);
auto* mapped_id = c_ref->mappers.find(model_found);
if (mapped_id) {
model_found = *mapped_id;
port_found = c->x[port].port;
return true;
}
}
compo_ref = enum_cast<component_ref_id>(c->x[port].id);
port = c->x[port].port;
}
}
static status build_model_to_component_connection(
const modeling& mod,
const component_ref& compo_ref,
simulation& sim,
int index)
{
auto* compo = m.components.try_to_get(compo_ref.id);
if (!compo)
return status::success; // @todo certainly an error
if (comp.connections[index].port_dst >= length(compo->x))
return status::success; // @todo certainly an error
irt_assert(index >= 0 && index < compo->connections.size());
irt_assert(compo->connections[index].type_src == child_type::model);
irt_assert(compo->connections[index].type_dst == child_type::component);
model_id model_found;
i8 port_found;
bool found = found_input_port(
mod,
enum_cast<component_ref_id>(compo->connections[index].dst),
compo->connections[index].port_dst,
model_found,
port_found);
if (found) {
auto* src_mdl = compo_ref.mappers.find(compo->connections[index].src);
auto src_port = compo->connections[index].port_src;
if (comp.connections[index].type == child_type::model) {
// classic connection between compo_ref
} else {
return sim.connect(*src_mdl, src_port, model_found, port_found);
}
return status::success; // @todo fail
}
static status
build_connections_recursively(const modeling& mod,
const component_ref& compo_ref,
simulation& sim)
static status build_connections_recursively(const modeling& mod,
const component_ref& compo_ref,
simulation& sim)
{
auto* compo = m.components.try_to_get(compo_ref.id);
if (!compo)
return status::success; // @todo certainly an error
// Build connections from the leaf to the head of the component
// hierarchy.
for (i64 i = 0, e = compo->children.size(); i != e; ++i) {
if (compo->children[i].type == child_type::component) {
u64 id = compo->children[i].id;
......@@ -163,15 +206,17 @@ build_connections_recursively(const modeling& mod,
return status::success;
}
static status
build_models(const modeling& mod, const component_ref& comp, simulation& sim)
static status build_models(const modeling& mod,
const component_ref& comp,
simulation& sim)
{
irt_return_if_bad(build_models_recursively(mod, component_ref, sim));
irt_return_if_bad(build_connections_recursively(mod, component_ref, sim));
return status::success;
}
status
build_simulation(const modeling& mod, simulation& sim)
status build_simulation(const modeling& mod, simulation& sim)
{
auto* component_ref = mod.component_refs.try_to_get(mod.head);
if (!component_refs)
......
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