modeling.cpp 5.95 KB
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// Copyright (c) 2020 INRA Distributed under the Boost Software License,
// Version 1.0. (See accompanying file LICENSE_1_0.txt or copy at
// http://www.boost.org/LICENSE_1_0.txt)

#include <irritator/modeling.hpp>

namespace irt {

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static void destroy_model(modeling& m, model& m);
static void destroy_component(modeling& m, component& c);
static bool is_input_port_exist(modeling&  m,
                                component& parent,
                                int        index,
                                i8         port);
static bool is_output_port_exist(modeling&  m,
                                 component& parent,
                                 int        index,
                                 i8         port);
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status
add_model(modeling& m, component& parent, model& mdl)
{
    auto ret    = status::success;
    auto mdl_id = m.models.get_id(mdl);

    if (parent.vertices.can_alloc(1)) {
        irt_return_if_bad(parent.vertice.try_emplace_back());
        auto& vertice = parent.back();
        vertice.id    = ordinal(mdl_id);
        vectice.type  = vertice_type::model;
    } else {
        ret = status::simulation_not_enough_model;
    }

    return ret;
}

status
add_component(modeling& m, component& parent, component& comp)
{
    auto ret     = status::success;
    auto comp_id = m.components.get_id(comp);

    if (parent.vertices.can_alloc(1)) {
        irt_return_if_bad(parent.vertice.try_emplace_back());
        auto& vertice = parent.back();
        vertice.id    = ordinal(comp_id);
        vertice.type  = vertice_type::component;
        com.parent_to(parent.d);
    } else {
        ret = status::simulation_not_enough_model;
    }

    return ret;
}
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void
destroy_vertice(modeling& m, component& parent, int index)
{
    irt_assert(index >= 0 && index < c.vertices.size());

    u64 id = parent.vertices[index].id;

    if (parent.vertices[index].type == vertice_type::model) {
        auto mdl_id = to_enum<model_id>(id);
        if (auto* mdl = m.models.try_to_get(mdl_id); mdl) {
            destroy_model(*mdl);
        }
    } else {
        auto compo_id = to_enum<component_id>(id);
        if (auto* compo = m.components.try_to_get(compo_id); compo) {
            destroy_component(m, *compo);
        }
    }

    c.vertices.pop_and_swap(index);
}

void
unref_vertice(modeling& m, component& parent, int index)
{
    irt_assert(index >= 0 && index < c.vertices.size());

    u64 id = parent.vertices[index].id;

    if (parent.vertices[index].type == vertice_type::model) {
        auto mdl_id = to_enum<model_id>(id);
        if (auto* mdl = m.models.try_to_get(mdl_id); mdl) {
            destroy_model(*mdl);
        }
    }

    c.vertices.pop_and_swap(index);
}

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status
add_edge(modeling&  m,
         component& parent,
         int        index_src,
         int        index_dst,
         i8         port_src,
         i8         port_dst)
{
    irt_assert(index_src >= 0 && index_src < c.vertices.size());
    irt_assert(index_dst >= 0 && index_dst < c.vertices.size());

    auto ret = status::success;

    auto& edge    = parent.edges.emplace_back();
    edge.src      = parent.vertices[index_src].id;
    edge.dst      = parent.vertices[index_dst].id;
    edge.type_src = parent.vertices[index_src].type;
    edge.type_dst = parent.vertices[index_dst].type;
    edge.port_src = port_src;
    edge.port_dst = port_dst;

    return ret;
}

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void
destroy_edge(modeling& m, component& c, int index)
{
    irt_assert(index >= 0 && index < c.edges.size());

    c.edges.pop_and_swap(index);
}

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status compute_simulation(modeling& m, simulation& sim)
{
    
}

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static void
destroy_model(modeling& m, model& m)
{
    m.models.free(m);
}

static void
destroy_component(modeling& m, component& c)
{
    for (auto i = 0, e = c.vertices.size(); i != e; ++i) {
        u64 id = parent.vertices[i].id;
        if (parent.vertices[i].type == vertice_type::model) {
            auto mdl_id = to_enum<model_id>(id);
            m.models.free(mdl_id);
        } else {
            auto compo_id = to_enum<component_id>(id);
            if (auto* compo = m.components.try_to_get(compo_id); compo) {
                destroy_component(m, *compo);
                m.components.free(*compo);
            }
        }
    }

    c.vertice.clear();
    c.edge.clear();
    c.x.clear();
    c.y.clear();
    c.tree.remove_from_hierarchy();
    c.parameters.clear();
    c.observable.clear();

    m.components.free(c);
}

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static bool
is_input_port_exist(modeling& m, component& parent, int index, i8 port)
{
    u64  id = parent.vertices[index].id;
    bool exist;

    if (parent.vertices[index].type == vertice_type::component) {
        auto  compo_id = to_enum<compo_id>(id);
        auto& compo    = m.components.try_to_get(compo_id);

        exist = 0 <= port && port < compo.x.size();
    } else {
        auto  model_id = to_enum<model_id>(id);
        auto& model    = m.models.try_to_get(model_id);

        exist =
          dispatch(model, [port]<typename Dynamics>(Dynamics& dyn) -> bool {
              if constexpr (is_detected_v<has_input_port_t, Dynamics>) {
                  return 0 <= port && port < length(dyn.x);
              }

              return false;
          });
    }

    return exist;
}

static bool
is_output_port_exist(modeling& m, component& parent, int index, i8 port)
{
    u64  id = parent.vertices[index].id;
    bool exist;

    if (parent.vertices[index].type == vertice_type::component) {
        auto  compo_id = to_enum<compo_id>(id);
        auto& compo    = m.components.try_to_get(compo_id);

        exist = 0 <= port && port < compo.y.size();
    } else {
        auto  model_id = to_enum<model_id>(id);
        auto& model    = m.models.try_to_get(model_id);

        exist =
          dispatch(model, [port]<typename Dynamics>(Dynamics& dyn) -> bool {
              if constexpr (is_detected_v<has_output_port_t, Dynamics>) {
                  return 0 <= port && port < length(dyn.y);
              }

              return false;
          });
    }

    return exist;
}

} // namespac eirt